A multiple switching power supply (SPS) system is useful in the applications that need more than one SPS. For example, in a thermal printer, a multiple SPS system includes a master SPS supplying a main power supply, and a slave SPS supplying a power for thermal process.
FIG. 1 shows a conventional current mode dual SPS system which is one possible candidate of the SPS system. The dual SPS system includes two current mode controller ICs, CON1 and CON2, in the primary side of the master SPS and the slave SPS, respectively. As a preferred embodiment, commercially available IC UC3842A made by Motorola Semiconductor Company is selected as the current mode controller. The external circuit to the CON1 or CON2 mainly includes the shown first external circuit and second external circuit. An output terminal (pin# 6) of CON2 is connected to the second external circuit 4. A supply voltage V.sub.cc terminal (pin# 7) of CON2 is connected to a circuit (not shown in FIG. 1) generating a supply voltage required for the operation of CON2. A reference voltage V.sub.ref terminal (pin# 8) of CON2 is connected to a collector terminal of the photo-transistor 33 of the isolation device 20. A compensation terminal (pin# 1) of CON2 is connected to a collector terminal of the photo-transistor 32 of the isolation device 15. A voltage feedback terminal (pin# 2) of CON2 is connected to an emitter terminal of the photo-transistor 33 of the isolation device 20. Both a base terminal of the photo-transistor 32 and a base terminal of the photo-transistor 33 are connected to the common ground. As the slave SPS is powered ON, voltage level of pin# 7 of CON2 is lifted up to 16 volts gradually. Afterwards, pin# 6 of the CON2 generates a slave SPS output signal 111 to activate the power supply shown in FIG. 5. Pin# 8 of CON2 outputs a reference voltage V.sub.ref of 5 volts. Either asserting a LOW compensation signal (pin# 1) or a HIGH feedback signal (pin# 2) can turn the slave SPS OFF. Further understanding of the operation of the IC UC3842A can be realized with reference to the description of the corresponding data book.
Basically, control circuit 2 in the secondary side circuit of slave SPS is provided for stabilizing the slave SPS output signal 111 outputted from pin# 6 of CON2. The slave SPS DC output signal 200 is inputted to the secondary side circuit of the slave SPS to stabilize the slave SPS output signal 111 through a negative feedback process described below. Depending on a variation of slave SPS DC output signal 200, a corresponding voltage across the resistor 30 is established and, in turn, adjusts the current flowing through the adjustable Zener diode 25. Moreover, the current flowing into the isolation device 20 depends on the variation of slave SPS DC output signal 200. This leads to a variation of the current flowing through pin# 2 and pin# 8 of the current mode controller CON2. Thus, the duty cycle of the slave SPS output signal 111 is varied, and the stabilization effect is reflected to the secondary side circuit of slave SPS. Through such negative feedback operation, the slave SPS output signal 111 is stabilized gradually, and finally approaches a steady state. In steady state, the slave SPS DC output has value around 14.5 volts. Above descriptions regarding negative feedback operation of the slave SPS is also applicable to that of the master SPS.
Conventionally, switch control of the slave SPS is realized by inputting the slave SPS DC output signal 100 to drive the LED 31 inside the isolation device 15, as illustrated in FIG. 1. The switch control of the slave SPS is implemented via first control circuit 1 in the secondary side circuit of the slave SPS described below. As a switching (ON/OFF) signal 101 is LOW, the isolation device 15 is disabled since the NPN transistor 10 is OFF. Then, the slave SPS keeps ON. On the contrary, as the switching (ON/OFF) signal 101 is turned to HIGH of around 5 volts, the NPN transistor 10 is ON. When the slave SPS DC output signal 100 and switching (ON/OFF) signal 101 both are HIGH, the LED 31 inside the isolation device 15 is ON and, in turns, the photo-transistor 32 is ON. Hence, pin# 1 of the current mode controller CON2 is grounded and the current mode controller CON2 is disabled. Therefore, the slave SPS output signal 111 is disabled. The voltage level of slave SPS DC output signal 100 starts to drop. When the voltage level of slave SPS DC output signal 100 drops to a voltage level of around 2.5 volts, the LED 31 becomes OFF and, in turn, disables the isolation device 15. However, this leads to an increasing voltage level of pin# 1 of CON2. As the voltage level of pin# 1 goes up to a certain level, the restart operation of CON2 is activated automatically. Therefore, the slave SPS is ON again and the voltage level of the slave SPS DC output signal 100 starts to increase which is not desired during OFF operation of slave SPS. As the voltage level of slave SPS DC output signal 100 goes up to a voltage level of around 8.6 volts, the LED 31 is turned ON again. Thus, pin# 1 of the current mode controller CON2 is grounded and the current mode controller CON2 is disabled. Therefore, the slave SPS output signal 111 is disabled again. Going through above stages repeatedly, the slave SPS DC output signal 100 of the conventional approach shows a residual voltage during OFF operation, as shown in FIG. 2.
Therefore, the slave SPS DC output signal 100 shows severe unexpected ripple, e.g. the residual voltage during OFF operation. In other words, a variation on the magnitude of the residual voltage at the DC output terminal of the slave SPS is detected as illustrated in FIG. 2. Such phenomenon exhibits instability in switching OFF the slave SPS of the dual SPS system when the slave SPS DC output signal 100 is employed as an activation signal. Moreover, in this conventional approach, more than one isolation device in the slave SPS are required, and this requirement means more space are needed and also introduces a certain level of difficulty during PCB layout process.
Therefore, it is desirable to eliminate the above-mentioned residual voltage generated during OFF operation of the slave SPS by another approach.
The main object of the present invention is to provide a cost effective solution to eliminate the residual voltage mentioned above with minimized number of the isolation devices.
The inventive apparatus for controlling the switching of slave SPS is implemented on the secondary side circuit of the slave SPS only, and this approach eliminates difficulties in the PCB layout process.